MA: Investigation of time dependent dielectric breakdown (TDDB) for a 4H-SiC CMOS technology at temperatures up to 500 °C

4. Dezember 2025

Anu Anna Koshy

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Silicon carbide (4H-SiC) MOSFET devices are essential for high-power and potentially also for high-temperature applications. However, especially the reliability of their gate oxides at high temperatures has not yet been extensively studied. This thesis investigates the gate oxide reliability by analysing the time-dependent dielectric breakdown (TDDB) behaviour of MOSFET and MOSCAP devices over a temperature range from 25 °C to 500 °C. The primary devices used in this study are non-ideal lateral (pseudo-vertical) pwell and nwell MOS capacitors and transistors with a nominal SiO₂ gate oxide thickness of 55 nm, thermally grown on 4H-SiC. Constant Current Stress (CCS) and Constant Voltage Stress (CVS), were employed to analyse TDDB behaviour across different temperatures and voltage regimes.

Time-Zero Dielectric Breakdown (TZDB) measurements established the baseline for breakdown characteristics and identified distinct regimes, including critical avalanche multiplication thresholds. Specifically, pwell MOSCAPs were stressed under negative bias and nwell MOSCAPs under positive bias, placing both devices in accumulation conditions whereas pMOSFETs and nMOSFETs were stressed so that the well regions were driven in inversion conditions with source, drain and body grounded. Based on the fields and current densities extracted from TZDB, the CCS and CVS parameters were adjusted accordingly for each temperature and considering the constraints in measurement time and number of available samples.

Critical analysis revealed that nwell MOSCAPs measured at low temperatures were strongly influenced by impact ionisation. The voltage-time-dependent behaviour and charge-to-breakdown characteristics were quantitatively investigated using CCS. CVS measurements performed at multiple temperatures enabled the extraction of field acceleration parameters using the thermochemical E-model, which allowed lifetime extrapolation at an operating voltage of 20 V. The results indicate that nwell MOSCAPs exhibited longer projected lifetimes compared to their pwell counterparts, with some deviations such as at 150 °C due to an improper selection of the applied electric fields or due to anomalies in the fitting due to the limited number of available samples. These factors result in unrealistically high extrapolated lifetimes at certain temperatures. Weibull statistical analysis was also performed, even though, only very limited number of samples was available. This ensured that the observed deviations and unrealistic extrapolated lifetimes particularly in pwell MOSCAPs occurred from limitations in data quality rather than much from methodological inconsistencies. A comparison between lifetimes derived from the thermochemical field driven model and Weibull analysis showed consistent trends, with predictions agreeing within the same order of magnitude across most temperatures. Overall, the investigation provides valuable insights and guidance for reliability evaluation of 4H-SiC CMOS devices for extreme temperature and high-field environments.

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