BA/FP: Design, Layout & Evaluation von SRAM-Komponenten für die Integration in OpenRAM

19. Oktober 2025

Beschreibung

SRAM is vital in modern hardware and custom accelerators because it delivers nanosecond-scale speed and predictable timing, acting as essential high-speed cache to prevent processors from stalling. Crucially, it’s power-efficient and integrates directly on-chip, minimizing costly off-chip data accesses – making it indispensable for energy-sensitive custom hardware (like AI accelerators) where low latency and high throughput are non-negotiable. In short, SRAM is the fast, efficient fuel for high-performance compute.

Ziele der Arbeit

In this work, the Open Source PDK by IHP (Leibniz Institute for High Performance Microelectonics) should be ported to the Open Source SRAM generator „OpenRam„. This needs in depth understanding of the structure and functionality of SRAM memory. You will have to layout custom cells like a reusable SRAM cell (e.g. a 6T cell), a write driver and a sense amplifier using the IHP design properties, extract important electrical properties and do spice simulations of the components. After this groundwork, you will extend the OpenRAM Python framework to use this data during the generation process. The aim is to be able to generate custom SRAM memory configurations by the end of the project.