Demonstration of an optimization loop to reduce the power losses of silicon carbide superjunction MOSFET designs for traction drives and battery charging applications.<\/p>\n\n\n\n
Subgoals<\/strong><\/p>\n\n\n\n Simplified, the blocking capability of a PN junction is related to the width of the space charge region according to the relation:<\/p>\n\n\nU_\\text{BC} \\approx E_\\text{crit} \\cdot d_\\text{SCR}<\/span>\n\n\n\n In conventional MOSFET designs, the space charge region starts to form at the junction of the body and the drift region as a one-dimensional front and expands proportionally with the reverse voltage. Superjunction changes the geometry of the junction to form a second front along which the space charge region expands with increasing reverse voltage. One of the fronts moves vertical as in conventional junction structures, while the second front moves lateral. As can be seen in the illustration below, at a high enough reverse voltage the lateral fronts will meet, causing the space charge region to increase in size significantly, making it much wider than normal for the given reverse voltage.<\/p>\n\n\n\n In conventional MOSFET designs, the size of the space charge region can be tuned via the doping concentration of the drift region following:<\/p>\n\n\nd_{\\mathrm{SCR}} \\propto \\sqrt{\\frac{1}{N_A} + \\frac{1}{N_D}}<\/span>\n\n\n\n But this causes the resistance of the drift layer to increase in proportion. Since the width of the space charge region in the superjunction concept is additionally increased as a result of its geometry, higher doping of the drift region becomes possible, in turn lowering drift resistance. Chip designs can use this freed budget to either lower on-resistance or chip size.<\/p>\n\n\n\n\n
Technical Background: Superjunction<\/strong><\/h2>\n\n\n\n
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